1. Field of the Invention
This invention relates to the field of Field Programmable Gate Arrays (FPGAs). In particular it relates to a method and apparatus of extending the functionality of FPGAs by providing a means for the inclusion of user-specified functions through inclusion of other functional circuitry on the integrated circuit die with the FPGA circuitry, and particularly with such circuitry implemented as mask programmable circuit regions on the integrated circuit.
2. The Prior Art
An integrated circuit uses a network of metal interconnects between the individual semiconductor components, which are patterned with standard photolithographic processes during wafer fabrication. Multiple levels of metallized patterns may be used to increase the flexibility of the interconnect.
It has long been recognized that a user-programmable interconnect technique or manufacturer programmability just prior to shipment would allow lower tooling costs and faster delivery time. To such an end, gate array circuits were developed.
A gate array circuit is an array of uncommitted gates with uncommitted wiring channels. To implement a particular circuit function, the circuit is mapped into the array and the wiring channels and appropriate connections are programmed to implement the necessary wiring connections that form the circuit function.
A gate array circuit can be programmed to implement virtually any set of functions. Input signals are processed by the programmed circuit to produce the desired set of outputs. Such inputs flow from the user's system, through input buffers, then through the circuit, and finally back out to the user's system via output buffers. Such buffers provide any or all of the following input/output (I/O) functions: voltage gain, current gain, level translation, delay, signal isolation, or hysteresis.
If the wiring channels and appropriate connections are programmed by the manufacturer according to the construction masks, then the gate array circuit is described as a mask-programmable gate array.
If the wiring channels and appropriate connections are programmed by the user according to programmable circuit elements, then the gate array circuit is described as an FPGA.
There are essentially two configurations of programmable circuit elements used to provide flexibility to the user for programming the FPGA. In the first configuration, an example of which is disclosed by El Gamal, et al. in U.S. Pat. No. 4,758,745, the FPGA can be permanently programmed by the user. In the second configuration, an example of which is disclosed by Freeman in U.S. Pat. No. 4,870,302, the FPGA can be changeably programmed by the user.
By comparison, a mask-programmable gate array offers higher functionality and performance and more efficient use of space while an FPGA offers lower design costs and greater user flexibility. Also, a mask-programmable gate array can implement any variety of I/O function and often at a higher speed than an FPGA. Other dedicated functional circuitry may also offer higher functionality and performance than its equivalent configured from FPGA components.